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general description the dg202/dg212 are normally open, quad single-pole single-throw (spst) analog switches. these cmos switches can be continuously operated with power supplies ranging from ?.5v to ?8v. maxim guarantees that these switches will not latch up if the power supplies are disconnected with input signals still connected. the dg202/dg212 are similar to the dg201/dg211 except for inverted control inputs. all devices have guaranteed break-before-make switching, as well as essentially constant on-resistance over the analog signal range. all switches conduct current in either direction and add no offset to the output signal. compared to the original manufacturer? products, maxim? dg202/dg212 consume very little power, making them better suited for portable applications. maxim has also eliminated the need for the third logic power supply (v l ) that is required for the operation of the original manufacturer? dg212 without sacrificingcompatibility. applications analog multiplexersprogrammable gain amplifiers communications systems sample/holds automatic test equipment pbx, pabx features ? guaranteed ?.5v to ?8v operation ? no v l supply required ? nonlatching with supplies turned off and inputsignals present ? cmos and ttl logic compatible ? monolithic, low-power cmos design dg202/dg212 quad spst cmos analog switches ________________________________________________________________ maxim integrated products 1 switches shown for logic ??input dip/so logic switch 01 off on 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 dg202dg212 v l s3d3 in3 in4 d4 s4 gnd pin configurations ordering information 19-3960; rev 3; 6/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package dg202 cue 0 c to +70 c 16 tssop dg202cse 0 c to +70 c 16 so dg202cj 0 c to +70 c 16 plastic dip dg202c/d 0 c to +70 c dice dg202aege -40 c to +85 c 16 qfn (5mm x 5mm) dg202aeue -40 c to +85 c 16 tssop dg202ady -40 c to +85 c 16 so dg202adj -40 c to +85 c 16 plastic dip dg202ak -55 c to +125 c 16 cerdip dg212 cue 0 c to +70 c 16 tssop dg212cse 0 c to +70 c 16 so dg212cj 0 c to +70 c 16 plastic dip dg212c/d 0 c to +70 c dice dg212ege -40 c to +85 c 16 qfn (5mm x 5mm) dg212eue -40 c to +85 c 16 tssop dg212dy -40 c to +85 c 16 so dg212dj -40 c to +85 c 16 plastic dip dg212ete -40 c to +85 c 16 thin qfn 1615 14 13 12 11 10 9 12 34 5 6 7 8 +15v dg202dg212 -15v v in x 10v * * * * 5k 10k 40k 20k 5k v out programmable gain amplifier note: *pins 1, 8, 9, and 16 are logic control inputs t ypical operating circuit pin configurations continued at end of data sheet. downloaded from: http:///
dg202/dg212 quad spst cmos analog switches 2 _______________________________________________________________________________________ absolute maximum ratings (dg212) electrical characteristics (dg212)(v+ = +15v, v- = -15v, gnd = 0, t a = +25?, unless otherwise noted.) (for more information on typ values see note 2.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v+ to v-?.............44vv in to ground..................? ...v-, v+ v l to ground?...................?-0.3v, 25v v s or v d to v+...........................?, -40v v s or v d to v-?.......................?.0, 40v v+ to ground?..................................?..25vv- to ground.................?..-25v current, any terminal except s or d?...............30ma continuous current, s or d..............?..20ma peak current, s or d (pulsed at 1ms 10% duty cycle max)?.........................70ma storage temperature range?...-65? to +125? operating temperature range dg212c ................................?.....0? to +70? dg212d/e .........................?.....-40? to +85? power dissipation (t a = +70?) (note 1) 16-pin plastic dip (derate 10.5mw/? above +70?) ..842mw 16-pin narrow so (derate 8.7mw/? above+70?). ....696mw 16-pin tssop (derate 9.4mw/? above +70?) ..........755mw 16-pin qfn (5mm x 5mm) (derate 19.2mw/? above +70?) .........................1538mw 16-pin thin qfn (derate 14.7mw/? above +70?) .........................1177mw parameter symbol conditions min typ max units switch analog signal range v analog -15 +15 v drain-source on-resistance r ds ( on ) v d = ?0v, v in = 2.4v, i s = 1ma 115 175 v s = 14v, v d = -14v 0.01 5.0 source off-leakage current i s ( off ) v in = 0.8v v s = -14v, v d = 14v -5.0 -0.02 v s = 14v, v d = -14v 0.01 5.0 drain off-leakage current i d ( off ) v in = 0.8v v s = -14v, v d = 14v -5.0 -0.02 v s = v d = 14v, v in = 2.4v 0.1 5.0 drain on-leakage current(note 3) i d (on) v s = v d = -14v, v in = 2.4v -5.0 -0.15 na input v in = 2.4v -1.0 -0.0004 input current with input voltagehigh i inh v in = 15v 0.003 1.0 input current with input voltagelow i inl v in = 0 -1.0 -0.0004 ? dynamic turn-on time t on 460 1000 t off1 360 500 turn-off time t off2 see switching time test circuitv s = 2v, r l = 1k , c l = 35pf 450 ns source off-capacitance c s ( off ) v s = 0, v in = 0, f = 1mhz 5 drain off-capacitance c d ( off ) v d = 0, v in = 0, f = 1mhz 5 channel on-capacitance c d + s ( on ) v d = v s = 0, v in = 5v, f = 1mhz 16 pf off-isolation (note 4) oirr 70 crosstalk(channel to channel) ccrr v in = 0, r l = 1k , c l = 15pf, v s = 1vrms, f = 100khz 90 db note 1: device mounted with all leads soldered to pc board. downloaded from: http:///
dg202/dg212 quad spst cmos analog switches _______________________________________________________________________________________ 3 absolute maximum ratings (dg202) voltages reference to v- v+..?.44vgnd?.?.25v digital inputs (note 1), v s , v d ............................-2v to (v+ + 2v) or 20ma, whichever occurs first current, any terminal except s or d?.?...30macontinuous current, s or d?..20ma peak current, s or d (pulsed at 1ms 10% duty cycle max).70ma operating temperature range dg202c ............................?.?..0? to +70? dg202d/e............?....?.??40? to +85? dg202a ..........?........................?55? to +125? storage temperature range..?.-65? to +150?power dissipation (note 2) 16-pin plastic dip (derate 10. 5mw/? above +70?) ... 842mw 16-pin so (derate 8. 7mw/? above +70?) .................696mw 16-pin tssop (derate 9. 4mw/? above +70?) ...........755mw 16-pin qfn (5 ? 5) ( derate 19.2mw/? above +70?) ...........................1538mw 16-pin cerdip (derate 10.0mw/? above +70?)......800mw dg202a dg202c, d, e parameter symbol conditions min typ max min typ max units switch analog signal range v analog -15 15 -15 15 v drain-source on resistance r ds ( on ) v d = ?0v, v in = 2.4v, i s = 1ma 115 175 115 200 v s = 14v, v d = -14v 0.01 1.0 0.01 5.0 source off-leakage current i s ( off ) v in = 0.8v v s = -14v, v d = 14v -1.0 -0.02 -1.0 -0.02 v s = 14v, v d = -14v 0.01 1.0 0.01 5.0 drain off-leakage current i d ( off ) v in = 0.8v v s = -14v, v d = 14v -1.0 -0.02 -1.0 -0.02 v s = -14v 0.1 1.0 0.1 1.0 drain on-leakage current(note 4) i d ( on ) v in = 2.4v v s = 14v -1.0 -5.0 na electrical characteristics (dg202)(v+ = +15v, v- = -15v, gnd = 0, t a = +25? , unless otherwise noted.) (for more information on typ values see note 3.) electrical characteristics (dg212) (continued)(v+ = +15v, v- = -15v, gnd = 0, t a = +25?, unless otherwise noted.) (for more information on typ values see note 2.) parameter symbol conditions min typ max units supply positive supply current i+ 0.02 0.4 negative supply current i- 0.01 0.4 logic supply current i l v in = 0 and 2.4v (all) 00 ma power-supply rangefor continous operation v op ?.5 ?8.0 v note 1: signals on s _ , d _ , or in _ exceeding v+ or v- on maxim? dg202 will be clamped by internal diodes, and are also internally cur- rent limited to 25ma. note 2: device mounted with all leads soldered to pc board. note 2: typical values are for design aid only, not guaranteed nor subject to production testing. note 3: i d(on) is leakage from driver into ?n?switch. note 4: off-isolation = 20 log v s /v d , v s = input to off switch, v d = output. stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. downloaded from: http:///
dg202/dg212 quad spst cmos analog switches 4 _______________________________________________________________________________________ note 3: typical values are for design aid only, not guaranteed nor subject to production testing. note 4: i d (on) is leakage from driver into ?n?switch. dg202a dg202c, d, e parameter symbol conditions min typ max min typ max units input v in = 2.4v -1.0 -0.000 4 -1.0 -0.0004 input current with inputvoltage high i inh v in = 15v 0.003 1.0 0.003 1.0 input current with inputvoltage low i inl v in = 0 -1.0 -0.000 4 -1.0 -0.0004 ? dynamic turn-on time t on 480 600 480 600 turn-off time t off1 see figure 1 switching timetest circuit 370 450 370 450 ns charge injection q c l = 1000pf, v gen = 0, r gen = 0 20 20 pc source off-capacitance c s ( off ) 55 drain off-capacitance c d ( off ) v s = 0, v in = 0 55 channel on-capacitance c d ( on ) + c s ( on ) v d = v s = 0, v in = 5v f = 140khz 16 16 pf off-isolation v in = 0, z l = 75 70 70 crosstalk(channel to channel) v s = 2.0v, f = 100khz 90 90 db supply positive supply current i+ all channels on or off 0.02 0.1 0.02 0.1 negative supply current i- all channels on or off -0.1 -0.01 -0.1 -0.01 ma power-supply range forcontinuous operation v op ?.5 ?8 ?.5 ?8.0 v electrical characteristics (dg202) (continued)(v+ = +15v, v- = -15v, gnd = 0, t a = +25? , unless otherwise noted.) (for more information on typ values see note 3.) downloaded from: http:///
_______________________________________________________________________________________ 5 dg202/dg212 quad spst cmos analog switches electrical characteristics (dg202)(v+ = +15v, v- = -15v, gnd = 0, t a = full opearting temperature range , unless otherwise noted.) (for more information on typ values see note 3.) dg202a dg202c, d, e parameter symbol conditions min typ max min typ max units switch analog signal range v analog -15 +15 -15 +15 v drain-source on resistance(note 5) r ds ( on ) v d = ?0v, v in = 2.4v, i s = 1ma 250 250 v s = 14v, v d = -14v 100 100 source off-leakage current i s ( off ) v in = 0.8v v s = -14v, v d = 14v -100 -100 v s = 14v, v d = -14v 100 100 drain off-leakage current i d ( off ) v in = 0.8v v s = -14v, v d = 14v -100 -100 v s = -14v 200 200 drain on-leakage current(note 6) i d ( on ) v in = 2.4v v d = 14v -200 -200 na input v in = 2.4v -1.0 -1.0 input current with inputvoltage high i inh v in = 15v 1.0 1.0 input current with inputvoltage low i inl v in = 0 -1.0 -1.0 ? note 5: electrical characteristics, such as on-resistance, will change when power supplies other than ?5v, are used. note 6: i d (on) is leakage from driver into ?n?switch. pin dip/so/tssop qfn/tqfn name function 1, 16, 9, 8 15, 14, 7, 6 in1?n4 input 2, 15, 10, 7 16, 13, 8, 5 d1?4 analog switch drain terminal 3, 14, 11, 6 1, 12, 9, 4 s1?4 analog switch source terminal 42 v- negative-supply voltage input 53 gnd ground 12 10 n.c. no connection 13 11 v+ positive-supply voltage input?onnected to substrate ? pe p exposed pad. connect exposed pad to v+ or leave ep unconnected. pin description switching time test circuit switch output waveform shown for v s = constant with logic input waveform as shown. note that v s may be +ve or -ve as per switching times test circuit. v o is the steady state output with switch on. feedthrough viagate capacitance may result in spikes at leading and trailing edge of output waveform. protecting against fault conditions fault conditions occur when power supplies are turned off when input signals are still present, or when over- voltages occur at the inputs during normal operation. in either case, source-to-body diodes can be forward biased and conduct current from the signal source. if downloaded from: http:///
dg202/dg212 quad spst cmos analog switches 6 _______________________________________________________________________________________ r ds(on) at analog signal level power supplies -5v +5v -10v +10v -15v +15v ?v 350 380 ?0v 165 250 ?5v 125 160 135 155 typical r ds(on) vs. power supplies for maxim? dg202, and dg212 this current is required to be kept to low (a) levels then the addition of external protection diodes is rec- ommended. to provide protection for overvoltages up to 20v above the supplies, a 1n4001 or 1n914 type diode should be placed in series with the positive and negative supplies as shown in figure 2. the addition of these diodes will reduce the analog signal range to 1v below the posi- tive supply and 1v above the negative supply. 1615 14 13 12 11 10 9 12 34 5 6 7 8 dg202dg212 in4001 -15v in4001 +15v figure 2. protection against fault conditions v o v o t off1 t off t off2 v s = +2v r l 1k d 1 s 1 in 1 c l 35pf v- v o 50% 3v 0 v s 0 v+ gnd 0.9 0.1 0.9 v o logic input switch input switch output t r < 20ns t f < 20ns logic 1 sw on switch input v o = v s logic input 0v -15v +15v (repeat test for in 2 , in 3 , and in 4 ) switchoutput r l r l + r ds(on) top view 16 15 14 13 5 12 3 4 1211 10 9 678 s1 v- gnd s4 s2v+ n.c. s3 d1 in1 in2 d2 d4 in4 in3 d3 dg202dg212 tqfn* *ep *exposed pad. connect exposed pad to v+ or leave exposed pad unconnected. pin configurations (continued) figure 1. switching time downloaded from: http:///
dg202/dg212 quad spst cmos analog switches _______________________________________________________________________________________ 7 soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations: package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
dg202/dg212 quad spst cmos analog switches 8 _______________________________________________________________________________________ pdipn.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
dg202/dg212 quad spst cmos analog switches _______________________________________________________________________________________ 9 cdips.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
dg202/dg212 quad spst cmos analog switches 10 ______________________________________________________________________________________ tssop4.40mm.eps package outline, tssop 4.40mm body 21-0066 1 1 g package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
dg202/dg212 quad spst cmos analog switches ______________________________________________________________________________________ 11 32l qfn.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
dg202/dg212 quad spst cmos analog switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. revision history pages changed at rev3: 1?, 11 qfn thin.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///

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